A case for PCI Express and the future of PC/104
The PC/104 Embedded Consortium continues to evolve the scope of embedded product under its charter and remains dedicated to ensuring that its namesake, the small form factor embedded PC/104 standard, thrives in today’s marketplace. Our recent adoption of the EBX and EPIC standards has served customers well, providing full-size and mid-size computing platforms with all the benefits of PC/104: expandability, ruggedness, and low cost. Now, the future of the PC/104 market rests on our ability to sustain these existing standards while introducing new technologies to meet upcoming challenges.
Today, leading-edge medical, retail Point of Sale (POS), gaming, and industrial automation applications are beginning to demand more than what the PCI bus can deliver. New technologies are coming to market in response to these demands and driving the development of next-generation platforms in competing architectures. For example, new I/O technologies (Gigabit Ethernet and IEEE 1394B immediately come to mind) effectively dominate almost all of the available bandwidth as a single device on the PCI bus, thereby creating an I/O bottleneck. The latest high-performance processors and chipsets have addressed this limitation through the introduction of a high-speed switched fabric interconnect. Leading switched fabric contenders that resolve the bandwidth problem include StarFabric, InfiniBand, RapidIO, and PCI Express.
There are plusses and minuses to the available options, and they go beyond the scope of this column: Is InfiniBand too large or complex for embedded applications? Is StarFabric too rigid (non-scalable) to address future expected user requirements and their need for technology updates? And does RapidIO’s lack of TCP/IP support impact end users in the embedded markets? While it has been a difficult game of prognostication, there is developing evidence that PCI Express may be the de facto winner in the embedded switched fabric race.
First of all, there is a specification available and the architecture is backed by significant players. Intel, Microsoft, IBM, and Dell are industry heavyweights, and where they go, embedded manufacturers often follow. Originally called 3GIO (Third Generation Input/Output), the PCI Special Interest Group (PCI-SIG) that oversees the PCI standard mercifully renamed it to PCI Express. Secondly, some industry groups have established a standard embedded format for PCI Express. Thirdly, silicon and connectors supporting PCI Express are already available. Now it is a matter of waiting for the commercial and consumer markets to fully engage, thereby putting downward pressure on pricing for PCI Express silicon. Lastly, with 4 GBps bandwidth, PCI Express adequately addresses the need for larger data transfer rates and eliminates the bottleneck resulting from limitations in available bandwidth associated with the PCI bus. At the time of writing this column, the PCI-SIG was reviewing Version 2.0 of the PCI Express specification.
An important element driving the success of any emergent technology is the need to establish a critical mass of users who must have or definitely want the solution. Beyond the significance of having companies such as Intel, Microsoft, IBM, and Dell driving the market, our counterparts at the PCI Industrial Computer Manufacturers Group (PICMG) ) are actively evolving new specifications that provide a high-speed serial interface capable of supporting these emerging technologies. Among the initiatives recently developed by PICMG is COM Express, an architecture that PICMG considers “The Next Big Trend in Embedded Computing Small Form Factors.” COM Express uses PCI Express architecture; namely, a point-to-point, high-bandwidth, low pin count, serial interconnect that maintains compatibility with the PCI bus.
PCI Express is fully compatible with existing PCI buses and promises to deliver higher performance in video, graphics, and other sophisticated applications. It also offers features that extend battery life, thereby increasing penetration into applications where low power operation is critical. Other groups, individual firms, and collections of companies are exploring how PCI Express might be implemented in future embedded designs. The broad adoption of PCI Express in the desktop, mobile, and telecom segments provides the impetus for convergence to occur across a broad base of markets, including the ubiquitous “embedded” market.
The PC/104 Embedded Consortium has deliberately and effectively “cornered the market” on small form factor product. Now we plan to maintain our leadership by identifying how PCI Express can be implemented within our product offerings. We have an identified problem: Available I/O bandwidth on the PCI bus. We have a solution that is backed by multiple and substantial organizations. Our competition within the small form factor embedded market, including organizations such as PICMG referred to earlier, has a PCI Express solution. The landscape has been defined.
The Consortium’s next efforts include a hard look at how PCI Express can be implemented onto products within our purview. The Consortium’s Board of Directors provided a roadmap at the Embedded Systems Conference in San Francisco earlier this year (refer to Figure 1) that offers insight into our future direction. Specifically, the Consortium believes that PCI Express will be the bus of choice for many applications and that we will need to maintain our legacy heritage while offering technology upgrades for those systems that need it.
The Consortium’s Board of Directors begun a technical discovery process within the membership and has started collecting information on the benefits of and interest in high-speed serial bus architectures. The Consortium’s Technical Committee has reviewed several PCI Express implementations and concepts and we will be soliciting input in the near future from the vertical markets, our customer base, and competing standards to flesh out how PCI Express might be implemented.
There is still substantial work to perform in order to map our course with respect to PCI Express. Building consensus within the membership on how, when, or if PCI Express might be implemented will be our next challenge. Member and end user input on the technical direction we take is essential to our success. We invite your comments and questions to help us navigate this important course.
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For further information, contact the Consortium: