Tasty alphabet soup from the Intel Developer Forum

Over three warm days this past September in San Francisco, Intel revealed to the chosen masses that servers and PCs (including laptops) are no longer the only legs the company has to stand on. Following the success of last year’s Atom microprocessor and the stated goal to permeate the low-power, handheld doodad market they call Mobile Internet Devices (MIDs), the company continues on an evolutionary “tick-tock” model of processor introduction.

Tracking Intel announcements requires a CIA background in cryptography, not only to translate the company’s processor code names, but also to understand their moves in context so announcements make sense. Take “tick-tock,” for example. In Intel-speak, the company introduces a fundamental technology or architecture (“innovate”) during the “tick” phase and follows that up in “tock” (“integrate”) with real-live products for sale. This year’s IDF was all “tock” – and code words became precursors to 2010 product announcements.

The PC/104 market is mostly Intel-based, with a small slice of ARM SBCs and a whiff of VIA devices (come on, VIA!). Due to the “small” part of “small form factors,” anything beyond a Pentium M isn’t coolable (21 W, code names: Banias, Dothan), and today you’d be hard-pressed to find many Core 2 Duo SFF SBCs on the market. That’s why the Atom (Silverthorne, Diamondville) was a such a blessing – better-than-Pentium M performance with versions down to 0.65 W TDP (most around 2.5 W). Intel is officially bifurcating their future Atom roadmap into CPU versions and System-on-Chip (SoC) versions. In case you missed it, Intel has already licensed the current Atom core to TSMC for custom SoC designs. In today’s 45 nm products, Sodaville is targeting consumer electronics, Jasper Forest is for general embedded, and Lincroft is for handhelds. Few details exist, but all are likely Atom derivatives.

The new roadmap makes it clear to ARM that Intel wants high-volume Application-Specific Standard Product (ASSP) sockets in MIDs such as portable media players, smart phones, GPS units, and any other consumer widget that relies on low power. You know, all the places where ARM cores dominate.

Achieving this goal requires extending Moore’s Law with more performance at lower power. At IDF Intel showed their 364 Mb, 2.9 billion transistor, 22 nm SRAM test chip – believed to be the world’s smallest – with 0.092 square microns per SRAM cell for high-density applications or 0.108 µm2 for low-voltage/power chips1. Today’s production products such as Core i7 (Nehalem, Westmere) are in 45 nm; next year’s products will be 32 nm (Sandy Bridge, Arrandale). Expect production 22 nm products by 2011.

To satisfy Size, Weight, and Power (SWaP), Intel will be adding more cores to Atom much like they’ve done with Core 2 and Core i7/i5. The company has brought the memory controller on-chip, and in Q1 2010, the Arrandale concept will combine the Northbridge/GPU on-chip with the CPU to save real estate and power while upping performance. First out of the chute will be a desktop CPU called Clarksdale; notebook versions will follow. Though Intel is mum on plans for Atom, I expect a dual-core version first, to be followed by an on-chip GPU à la the Arrandale concept – just like VIA did more than five years ago with Chrome (not to be confused with Google’s “Chrome” software browser – I guess shiny is “in”).

In 2008, Intel went on record essentially stating that the biggest obstacle to multicore technology was the lack of software designed to capitalize on hardware performance. New CPU features called Turbo Boost and Hyper-Threading automatically “spool up” underused cores and clock cycles (Clarksdale). The company has notched the Intel Architecture instruction set from SSE to SSE4 and next year will introduce AES in Westmere. AES is the Advanced Encryption Standard block cipher (I told you it was necessary to be ex-CIA!), and Intel will lock down the CPU and code as the whole world gets more wired to the Internet and even Mom becomes security-conscious. In parallel (pun intended), Advanced Vector Extensions (AVX) will get added to SSE4 to handle vector and scalar data sets on processors that are now capable of substantial DSP performance. If you consider that one low-cost/power CPU will soon do housekeeping, graphics, DSP, crypto, and media codecs, it’s no wonder the company is focusing more than ever on software.

Which brings me to Windows 7. Microsoft seems to have remedied the sins of Vista, while corporations and consumers are hungry to replace Pentium 4 XP machines with Core i7/Windows 7 rigs. Gee, do you think the “7” is a coincidence? Windows 7 and its embedded flavors will spill over into the PC/104 and SFF market for sure. Intel’s roadmaps include SSE4 and hardware hooks designed to work with Windows 7 in power management, start/stop and resume speed, graphics and multimedia, and security and remote management. None of these are particularly new, but Intel’s Active Management Technology and Anti-Theft Technology – designed for corporate environments and IT admins – will be ideal in autonomous, remote embedded systems.

There’s much, much more to say about Intel’s plans for 2010. Keep watching this space as the company stirs the soup and new processors float to the surface, just like alphabet noodles.

Chris A. Ciufo Group Editorial Director cciufo@opensystemsmedia.com

1 IC technology relies on transistor cell technology. In the past, EPROM, DRAM, and SRAM transistors were used to prove out new process geometries. Intel has no plans to produce SRAM chips.