The PC/104 bus

The PC/104 bus is, in essence, the ISA bus from the IBM personal computer AT and XT days. It is derived from the PC/AT (16-bit) and PC/XT (8-bit) bus specifications. The popularity of the PC/104 form factor is due to its compact board size, the incorporation of a mature open standard bus protocol (the ISA bus), and the vast number of diverse PC/104 modules available from a multitude of vendors.

Figure 1
(Click graphic to zoom)

The 8-bit ISA bus was originally introduced on the IBM Personal Computer in 1981. In 1984, IBM introduced the 16-bit version of the ISA bus with the release of the PC/AT. IBM documented the schematics and BIOS listings of the ISA bus in a text titled PC-AT Technical Reference. This document, however, did not define the detailed timing requirements for the ISA bus. The Institute of Electrical and Electronic Engineers (IEEE) created the IEEE P996.1 specification to define the ISA bus, but this document was a draft version that was never officially released and is no longer available or maintained by IEEE.

The PC/104 form factor was originally developed in 1987 by Ampro Computers. In 1992, Ampro defined and published the PC/104 specification and created the PC/104 Consortium, which maintains the specification. The current version of the PC/104 specification, version 2.5 (November 2003), defines the differences between the PC/104 bus and the original ISA bus as detailed in the book, ISA and EISA Theory and Operation, by Edward Solari. This book is defined as the reference ISA specification in the PC/104 specification. The primary differences between the ISA and PC/104 specifications are:

  • A reduced size board form factor
  • A self-stacking bus versus a backplane or a card cage
  • Reduced power consumption via a reduced bus drive current requirement

The PC/104 bus has a total of 104 pins, which consist of:

  • 20 address lines
  • 7 latched address lines
  • 16 data lines
  • 11 interrupt request lines
  • 32 control lines
  • 14 ground and power lines
  • 2 key locations
  • Master clock
  • Oscillator signal

The PC/104 bus connector consists of a 64-pin, dual-row connector labeled as J1/P1 and a 40-pin, dual-row connector labeled as J2/P2. The PC/104 bus is a 5 V transistor-transistor logic-based bus. The output low logic level can be 0 V to 0.4 V and a high output logic level can be 2.4 V to 5 V ±5 percent. The input low logic level can be -0.5 V to 0.8 V and a high input logic level can be 2.0 V to 5 V +0.5 V.

When a PC/104 board is used as a 16-bit module, both the J1/P1 and J2/P2 connectors will be present and the address, data bus, IRQ, and bus control signals on both connectors are available for bus communications. When a PC/104 board is used as an 8-bit module, typically only the J1/P1 connector will be installed. The address, data bus, interrupt line request, and bus control signals available on the J1/P1 connector are used for bus communications. On an 8-bit module, the J2/P2 connector may be physically installed, but it is only a passive connector allowing the module to be located anywhere in a PC/104 stack. When acquiring PC/104 modules for a design, it is important to know if the module is configured as an 8-bit or 16-bit module for proper programming and data access to that board from a host computer, and for the physical arrangement of the board in the PC/104 stack.

The J1/P1 and J2/P2 connector on a PC/104 circuit board or embedded system that features a PC/104 bus-compatible connector will be configured or available in a stackthrough or non-stackthrough variation. A stackthrough PC/104 connector means that the pins mounting the J1/P1 and J2/P2 connectors to the PC/104 circuit board will extend through the bottom of the board by approximately 0.420", allowing the board to be inserted or stacked on top of another board or embedded system that features a PC/104 bus-compatible connector. A non-stackthrough PC/104 connector means that the pins mounting the J1/P1 and J2/P2 connector to the board are flush with the bottom.

If your company is actively involved with the design or utilization of PC/104 boards, consider joining the PC/104 Consortium.

Additional information, including the PC/104 specification, is available at

The following books are excellent sources on the electrical, timing, and communication aspects of the ISA bus:

ISA and EISA Theory and Operation, by Edward Solari, Annabooks, ISBN: 0929392159

ISA System Architecture (third edition), by MindShare, Don Anderson, Tom Shanley, Addison-Wesley Professional,
ISBN: 0201409968

The Embedded PCs ISA Bus, by Ed Nisley, Annabooks,
ISBN: 157398017X

The Indispensable PC Hardware Book (4th Edition), by Hans-Peter Messer, Addison-Wesley Professional,
ISBN: 0201596164

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For more information on PC/104 and the ISA bus, visit:

Joel Huebner is president of Jacyl Technology, Inc. He holds two degrees with honors from Purdue University in Electrical Engineering and Computer Engineering. Joel has more than 15 years’ experience as an electrical design engineer in the military aerospace industry and in the custom electronic design R&D industry.

For further information, contact Joel at:

Jacyl Technology, Inc.
P.O. Box 350
Leo, IN 46765
Tel: 800-590-6067