Version 2.0: The evolution of SMARC module specification

Earlier this year, the Standardization Group for Embedded Technologies (SGET) updated its Smart Mobility Architecture (SMARC) embedded computing format to the 2.0 specification. Since its inception three years ago, the SMARC small-form-factor module has given developers an innovation boost for the ultra-low-power embedded market. Due to its widespread adoption and successful application, SGET members determined that Version 2.0 was needed to support next-generation design requirements.

The primary reason to implement a new SMARC 2.0 specification is to provide an enhanced pinout that would better meet broader application requirements and processor interfaces. Essential to the standard’s ongoing viability, an updated spec also needed to offer backward compatibility with the original standard set in 2013 for low-profile form factor modules.

SMARC development history

The SMARC format was originally created out of the necessity for a computer-on-modules (COMs) standard that would support and accommodate energy-saving ARM system-on- chip (SoC) processors. Since the inception of the format, Intel has subsequently improved the power efficiency of its processors with Atom-based SoCs, making the SMARC format also very well suited for x86 architecture-based products. SMARC answers the needs of systems integrators who want to be able to leverage available user-interface options to the fullest to support access to the smaller, low-cost display modules employed in many of today’s advanced mobile devices.

SMARC modules are targeted to embedded systems developers that want the design flexibility of using COMs and carrier boards, and also to system developers requiring SoC-based, ultra-low power COMs in miniature format. Actually, the application areas that can use SMARC modules is continually expanding, from solutions in the automation market to graphics and image-centric devices which also require extremely low energy consumption and must withstand extreme environmental conditions. The modules also serve as building blocks for very small portable handheld devices as well as for larger devices where consumption must not exceed a few watts and the computing-power requirement is particularly high.

Per the SGET specification, two module sizes are defined: a full-size module that measures 82 mm by 80 mm, and a short module for more compact systems measuring 82 mm by 50 mm. Both use the proven Mobile PCI Express modules (MXMs) edge connector that features 314 edge fingers that mate with a low-profile 314-pin/0.5 mm pitch right-angle connector. Different from the PCI Express focus of COM Express, SMARC gives developers additional flexibility in handling different types of video and graphics output, serial buses, general-purpose SPI, client and host forms of USB, plus serial and parallel camera interfaces. It also provides support for standard flash-memory card formats such as SD and eMMC.

SMARC’s modular approach offers built-in scalability and upgradability, enabling OEMs to get to market quickly with low-cost, low-power, and small-footprint solutions.

Once the SMARC standard was in place, companies in this space addressed market demand by offering modules with ARM SoC processors including the Freescale i.MX 6, Texas Instruments Sitara 3874, and NVIDIA Tegra 3. Developers now had the building blocks to more easily engineer ultra-low-power devices.

What changed with Version 2.0?

SGET recognized the need for the SMARC connector’s 314 electrical contacts to support and provide compatibility with two distinct SoC architectures – not only ARM, but also x86. With ARM, for example, the connector must guarantee a high degree of signal integrity as required by the high-frequency serial interfaces, as well as support a parallel TFT display, MIPI display interface, camera interfaces, multiple SPI links, and SDIO interfaces. At the same time, it must offer full compatibility with x86 requirements such as support for multiple USB and PCI Express lanes, and support for the LPC bus. Based on three years of valuable market feedback from a broad range of developers and users, SGET successfully updated the original specification. (See Table 1 below.)

As part of its policy of continuous improvement, members recommended a variety of modifications and enhancements. Specifically, they identified interfaces which were rarely used or considered nearly outdated; these have now been removed from the specification. These little-used interfaces include the parallel camera interface, parallel display interface, PCI Express presence and clock request signals, alternate function block, SPDIF, one I2S (out of three), and the eMMC interface to the carrier.

The new pinout version maintains compatibility with the V1.1 pinout as much as possible. Accordingly, previously under-utilized V1.1 pins have been repurposed for new interfaces: In particular, the parallel LCD interface offers almost 50 pins that have been repurposed to DP++, the second Ethernet port, and the upgraded dual-channel LVDS. The overall guiding principal was that there should be no damage if a V1.1-compliant module is placed into a V2.0-compliant carrier, or vice-versa if a V2.0-compliant module is placed into a V1.1-compliant carrier. Developers can still count on SMARC 2.0 support for 1x SATA, 2x CAN, 1x SDIO, 12x GPIO, 1x HDMI, 4x UART, 4x I2C, and 1x SPI.

Table 1: Chart “SMARC 2.0 – what’s new”

  • The new version V2.0 will repurpose selected V1.1 pins that are underused for new interfaces in order to keep the compatibility with the V1.1 pins.
  • New interfaces include a second channel LVDS, a second Ethernet port, IEEE1588 trigger signals, a fourth PCI Express Lane, extra USB ports (now up to 6x USB 2.0 + 2x USB SS signals), x86 power management signals, eSPI, and DP++.
  • Three digital displays: As primary display, 2 x 24-bit LVDS or eDP (four channels) or MIPI DSI (four channels) can be used; the secondary display can either be HDMI or DP++, and the third display can be DP++.

Meeting broader application needs

SMARC 2.0 enables manufacturers to make more sophisticated products for its customers, and offers the features necessary to create the Internet of Things (IoT) applications of the future. For example, the second gigabit Ethernet (GbE) port allows designers to more easily develop simple gateway solutions. In addition, wireless connectivity can be enabled with the Version 2.0 optional RF connector.

Ultra-low-power applications now get the benefit of full HD display support from the second LVDS channel. Furthermore, with the DP++ (dual-mode DisplayPort) interface that supports resolutions up to Ultra HD with 3,840 by 2,160 pixels makes state-of-the-art multimedia-based systems possible in mobile devices. Utilizing the DP++ interface allows systems integrators to connect DisplayPort, HDMI, and DVI displays. The dual-channel LVDS capabilities in Version 2.0 provide the ability to drive either two low-resolution displays or a single high-resolution display supporting up to 1,920 by 1,200 pixels at 60 Hz depending upon the processor used.

There is also support for additional PCI Express (PCIe) and USB ports to streamline the process of connecting necessary computing peripherals for developers. SMARC 2.0 supports up to six USB 2.0 ports and two USB 3.0 interfaces. Available are now four PCIe lanes for platform-specific extensions delivering the flexibility to add new application functionality.

Figure 1: SMARC-sXAL provides extensive real-time computing power in an energy-efficient and flexible platform. Users benefit from improved computing performance and long-term availability.

The bottom line is that the interfaces now supported are optimized for both ARM and x86-based SoCs. SMARC provides a COMs standard for interfacing different SoCs. By unifying these interfaces through standardization, OEMs can achieve greater flexibility with exchangeability between carrier boards and modules, allowing them to innovate applications that are able to migrate between very-low-power ARM platforms all the way up to 15W TDP x86 platforms.

Defined for the future

SGET has upgraded the SMARC 2.0 specification, making these modules ideal building blocks for future innovative and sophisticated applications. It maintains backward compatibility while offering next-generation interface support, aligning perfectly with SoC technology evolution.

As a founding member of SGET, Kontron is committed to remaining at the forefront of SMARC standard definition. The company recently announced new SMARC 2.0 modules based on the latest generation Intel Atom, Pentium, and Celeron processors. (See Figure 1.)

For more information about SGET and SMARC visit

Martin Unverdorben is the product manager for SMARC at Kontron and is an active member of the Standardization Group for Embedded Technologies (SGET) committee. Using his prior experience as a field application engineer, Martin regularly trains customers in the design and implementation of computers-on-module (CoMs) in their applications. Martin holds a degree in electrical engineering.